---
title: "The Million-Dollar Bottleneck: Why PCBA Test Falls Behind High-Speed SMT Lines"
description: See why panelized PCBAs can overwhelm in-circuit test, in-system programming, and functional test - and how parallel testing restores SMT takt time.
image: https://www.checksum.com/hubfs/Million%20Dollar%20Bottleneck%20Image%20C.png
---

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 4 min read

# The Million-Dollar Bottleneck: Why PCBA Test Falls Behind High-Speed SMT Lines

[![Picture of John VanNewkirk](https://www.checksum.com/hubfs/John%20VanNewkirk%20Photo%20Avatar.jpg) John VanNewkirk](https://www.checksum.com/checksum-blog/author/john-vannewkirk) :  Aug 21, 2024, 1:00:00 PM

[Parallel Testing](https://www.checksum.com/checksum-blog/tag/parallel-testing) [PCBA Testing](https://www.checksum.com/checksum-blog/tag/pcba-testing) [SMT Manufacturing](https://www.checksum.com/checksum-blog/tag/smt-manufacturing) [In-Circuit Test (ICT)](https://www.checksum.com/checksum-blog/tag/in-circuit-test-ict) [Functional Test](https://www.checksum.com/checksum-blog/tag/functional-test) [Panelized PCBAs](https://www.checksum.com/checksum-blog/tag/panelized-pcbas)

![The Million-Dollar Bottleneck: Why PCBA Test Falls Behind High-Speed SMT Lines](https://www.checksum.com/hubfs/Million%20Dollar%20Bottleneck%20Image%20C.png)

**Table of Contents**

[What's Your Bottleneck?](https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#In-electronics-manufacturing)

[Panels Behaving Badly](https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#Panels-Behaving)

[Why Doesn't Test Scale?](https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#Test-is)

[Is Test Your Bottleneck?](https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#Is-Test)

[The Power of Parallel](https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#The-Power)

[Parallel Functional Test – A Unique Solution](https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#Parallel-Functional)

**Originally Published on LinkedIn:**  August 21, 2024   
**Published on CheckSum.com:** November 24, 2026  

In electronics manufacturing, we focus improvement efforts on making the bottleneck more efficient because our slowest process determines the factory’s output. When we speed up the bottleneck, we benefit from the full value of the added production. So, fixing your bottleneck is usually a great investment and one of the key goals in manufacturing.<https://www.checksum.com/checksum-blog/pcba-test-bottleneck-high-speed-smt-lines#parallel-functional-test>

## What's Your Bottleneck?

The first step is identifying the bottleneck. Over the years, we have seen factories with bottlenecks at every step of the process – programming of big memory devices, pick and place, functional test, and even depaneling. When a low-cost step like depaneling is your bottleneck, the payback from fixing the issue is faster than when upgrading expensive pick and place machines.

## Panels Behaving Badly

As components get smaller and chips get more powerful, circuit boards are shrinking, so design engineers squeeze more boards in a panel. This trend is not new, but over the past 20 years, the cumulative effect is major. A 4-up panel from 1995 is now a 10-up panel. In automotive electronics, at least 20% of the boards produced are made in 8-up or larger panels.

![CheckSum panels drive output comparison showing a 2-up PCBA panel producing 240 boards per hour and a 10-up panel producing 1,200 boards per hour at the same 30-second SMT takt time.](https://www.checksum.com/hs-fs/hubfs/Panel%20Drive%20Output%20Image.png?width=1920&height=1077&name=Panel%20Drive%20Output%20Image.png)

Increasing panel density from 2-up to 10-up increases production output from 240 to 1,200 boards per hour at the same SMT takt time.

Panels do not cause issues for the surface-mount technology (SMT) line. The Solder Paste Inspection machine does not care if the panel has one big board or a panel of 20 boards. Pick and Place is not tested by a 12-up panel. The job is the same. Most processes are limited by the number of components or the size of the panel, so denser panels are not an issue, except for the process at the end of the line: board test.

Board test does not scale the same way the rest of the SMT line scales. The test processes for an 8-up board can take 3x longer than for a 2-up panel and that is a problem that creates a new **BOTTLENECK**.

## Why Doesn't Test Scale?

Test is made up of three distinct activities: [In-Circuit Test (ICT)](https://www.checksum.com/in-circuit-test-systems), Part Programming, also called [in-system programming (ISP)](https://www.checksum.com/in-system-programming), and Functional Test (FT or FCT). The time spent on each step is more complex than just a linear relationship to the number of components. Part programming time depends on the BUS speed and size of the data file. Functional test time depends on the specific functionalities being tested and can vary widely. The problem with test is that **it takes the time it takes**. Many of the test steps just cannot be done faster.

![Traditional VS CheckSum Parallel Test™ comparison.](https://www.checksum.com/hs-fs/hubfs/Traditional%20VS%20Parallel.png?width=1017&height=570&name=Traditional%20VS%20Parallel.png)

## Is Test Your Bottleneck?

If your test cell cannot keep up with the SMT line, then test is your bottleneck. If the bottleneck were on the SMT line, the line would be slowed down to accommodate the slowest step. Since test is typically performed off the line, most factories act like test isn’t the bottleneck and keep producing boards as quickly as possible. For panels, this results in a buildup of untested inventory. Building up boards faster than they can be tested is risky because mistakes happen.

Rework and scrap are the inevitable result of large volumes of untested boards. The volume of untested inventory typically increases as the panel size increases, so an 8-up panel will cause more of a bottleneck at test than a 2-up panel.

## The Power of Parallel

The only way to test a 10-up panel as fast as a 2-up panel is to test multiple boards at the same time. Twenty years ago, CheckSum launched [MultiWriter™](https://www.checksum.com/in-system-programming), the first production solution for onboard programming of panels.

> **MultiWriter™ programs all the chips (up to 384) in the panel simultaneously, so your 20-up panel is programmed as fast as a single board.**

And, recently, we announced the launch of our [ILS-X2 automated handling system](https://www.checksum.com/ils-x2-dual-panel-automated-test-system) that allows us to test 2 panels of boards simultaneously – a mechanical addition to our parallel test portfolio, essentially doubling the output of our parallel test capabilities.

Over time, we realized that parallel was helpful in ICT and FT just as much as with on-board programming. Our customers told us that they just need to go faster, so speed improvements at every step are beneficial. Our In-Circuit Test is typically the fastest available, so adding a Multi-Core capability has given our customers the opportunity to do ICT 4x faster than before.

![CheckSum's test capability creates options for the customer and each project.](https://www.checksum.com/hs-fs/hubfs/Logos%20Capabilities%20Image-1.png?width=1017&height=572&name=Logos%20Capabilities%20Image-1.png)

When production test cannot keep pace with SMT output, untested printed circuit board assemblies can accumulate.

## Parallel Functional Test – A Unique Solution

A decade ago, we began developing a new kind of parallel test – [Parallel Functional Test (PFT)](https://www.checksum.com/parallel-functional-test). Several of our customers used MultiWriter™ to program test code in their chips that we would execute and measure various outputs to confirm functionality. It was a great idea, so we decided to develop a complete solution that could perform many of the common functional test steps in parallel, not just built-in self-test.

Parallel Functional Test allows our customers to perform a wide range of functional tests on the entire panel simultaneously.

> **So, if you have a 10-up panel with a 15 second LIN test, CheckSum can test the entire panel simultaneously and save 135 seconds of FT time.**

Our PFT portfolio has expanded to include CAN, LIN, SPI, JTAG, UART, or any other serial BUS, voltage and current measurement, loads, and power control. What will we add next? You tell us what you need! CheckSum develops new PFT capabilities based on user projects and our offering is constantly evolving.

Why Parallel? Simple, because it is the only way to speed up test and eliminate the bottleneck affecting your factory. World class manufacturers need solutions to eliminate the testing bottleneck for panels, so CheckSum has developed a suite of parallel test solutions to meet the need.

If panels are causing problems and test is your bottleneck, please contact CheckSum to see if a parallel test solution is right for you.

## Find Out What Parallel Test Could Do for Your Production Line

CheckSum's Free Parallel Test Project Analysis shows how parallel test can change the throughput, capacity and economics of your application.

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